NovuTensor: Hardware Acceleration of Deep Convolutional Neural Networks for AI

Wednesday, May 23, 3:30 PM - 4:00 PM
Summit Track: 
Enabling Technologies
Exhibit Hall A-2

Deep convolutional neural networks (DCNNs) are driving explosive growth of the artificial intelligence industry. Effective performance, energy efficiency and accuracy are all significant challenges in DCNN inference, both in the cloud and at the edge. All these factors fundamentally depend on the hardware architecture of the inference engine. To achieve optimal results, a new class of special-purpose AI processor is needed – one that works at optimal efficiency on both computer arithmetic and data movement. NovuMind achieves this by exploiting the three-dimensional data relationship inherent in DCNNs, and by combining highly efficient, specialized hardware with an architecture flexible enough to accelerate all foreseeable DCNN structures. The result is the NovuTensor FPGA and ASIC chip, which puts server-class GPU/TPU performance into battery-powered embedded devices.


Miao (Mike) Li

Vice President of IC Engineering, NovuMind, Inc.

Mike Li has been leading IC Engineering at NovuMind Inc., since 2017. Before joining NovuMind, he has been technical director at various industry leaders, including Inphi, Avago Technologies, Stretch Inc. etc.. With experience across the IC design flow from frontend to background, Mr. Li drove the world’s first 16nm PAM4 400Gbps mixed signal DSP chip into production, led the first commercial FBAR CMOS oscillator chip design and helped in creating Avago’s timing product line. In his early career, Mike worked at senior ASIC Designer and Architect roles, and contributed actively in the success of Amber Networks (acquired by Nokia) and in the creation of Mobile Business Unit at Atheros Communications (acquired by Qualcomm). Mike received his MSEE degree from Polytechnic University (NYU, School of Engineering) in 1999, and BSEE degree from the University of Electronic Science and Technology of China in 1997.

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