Analog Devices' Latest Blackfin Proliferations Get Embedded Vision Religion
As readers of the last two Embedded Vision Insights newsletters already know, Analog Devices took advantage of the late-March Embedded Systems Conference Silicon Valley and quarterly Embedded Vision Alliance Summit to unveil the latest entries in the high-performance segment of its multi-vector Blackfin SoC product line (Figure 1). Two weeks ago, I published a videorecorded interview I'd earlier conducted with ADI's Colin Duggan, discussing these and other topics. And today, I thought I'd go into more detail on the products themselves.
Figure 1. Analog Devices' new BF60x Blackfin SoC family consists of two devices for general-purpose DSP applications and two others with embedded vision-focused feature set enhancements.
The BF60x product family consists of four devices, all containing dual-core architectures running at 500 MHz. The Blackfin cores are functionally identical to their counterparts in the prior-generation BF561, but the lithography shrink from 130 nm to 65 nm has curiously de-accelerated the new SoCs' clock speeds from the 600 MHz found in the BF561. The process migration has, however, boosted the amount of on-chip memory; whereas the low-end BF606 integrates 128 KBytes of L2 SRAM (the same as found on the BF561), the BF607 doubles that allocation, to 256 Kbytes (Figure 2).
Figure 2. The members of the BF60x family differ in the amount of on-chip L2 SRAM, as well as the presence or absence (and clock speed) of the optional PVP (Pipelined Vision Processor).
Also redesigned in the BF60x family is the high-speed intra-core system crossbar, which delivers both higher bandwidth and concurrent data movement critical in video and other data-intensive applications, and the system memory controller, which now handles DDR SDRAM (versus only conventional SDRAM in the BF561). The BF60x family both upgrades and augments the on-chip peripheral suite as compared to the prior-generation Blackfin, and it supports code and data reliability capabilities such as parity and ECC that are particularly demanded by automotive systems designers.
And what about the earlier mentioned embedded vision application emphasis? That's the bailiwick of the PVP (Pipelined Vision Processor), shown in the bottom of Figure 2. In the BF609, it runs at 83 MHz and handles HD (1280x960 pixel) resolutions; the variant in the BF608 runs at an unspecified lower clock speed and deals with VGA frame sizes. Both the BF608 and BF609 handle monochrome video at up to 30 fps frame rates.
In developing the PVP, Analog Devices traded off several conflicting application needs: flexibility, performance, power consumption and cost. Yet another full-featured DSP core on the SoC would have been too costly in terms of silicon area, not to mention exceeding Analog Devices' 1.3 W worst-case power consumption target across the device's -40°C to +105°C operating temperature range. And anyway, as director of marketing Colin Duggan pointed out, functions such as arctangent and square root, critical in several BF60x target applications, cannot be done in a single cycle in a conventional DSP.
On the other hand, a completely hardwired function block would be insufficiently flexible, especially at this nascent stage in embedded vision's development: Different applications, different customers and different projects at each customer all develop their algorithms in different ways. To wit, the dice-counting demonstration system that ADI developed in partnership with BDTI initially had several different candidate means of discerning which face each die was presenting to the camera; the final selection balanced accuracy against speed in various lighting and other environment settings (see "Case Study: How To Make A Really Attention-Getting Demo" in the InsideDSP section of BDTI's website).
The PVP, as described by ADI, is configurable but not programmable. This is an important distinction, as it's not actually running software instructions. It provides hardware acceleration in three major embedded vision function areas: object detection, object tracking, and object identification. And all three of these function areas are commonly found in three key application groups targeted by ADI: ADAS (automotive driver assistance systems), industrial machine vision, and security and surveillance. The PVP provides twelve signal-processing blocks that support a variety of commonly used algorithms, up to five of which can run concurrently (Figure 3).
Figure 3. The PVP is configurable but not programmable, trading off flexibility, performance, power consumption and cost goals ("Conv" blocks perform convolutions).
Analog Devices consciously dispensed with full-color operation for the PVP because, according to Duggan, a monochrome-only focus was acceptable with the vision algorithms that ADI’s customers are targeting, and the decision made a cost- and power-efficient implementation possible. Duggan made a point of emphasizing that full-color embedded vision processing is still possible on the BF608 and BF609, by combining the processing resources of the PVP and one or both Blackfin cores. In a security application, for example, you could use the PVP to discern a region of interest and then do further identification processing on Blackfin. And in an automotive application, you could find and assess (via optical character recognition) the meaning of road signs using the PVP, if necessary further discerning the signs' colors with Blackfin.
Pricing for the BF60x SoC series begins at $15 (quantity 1,000). The "superset" BF609 is now sampling, with all four devices available when the product family enters volume production next year. The Cross Core Embedded Studio software development suite, ADSP-BF609 EZ-KIT development board, and a series of in-circuit emulators are also now available.